1. Field of the Invention
The present invention relates to a system for generating a local clock signal synchronized to an external reference clock, and more particularly, to an improved digital system that provides precise control of the local clock, particularly for a SONET local clock generator.
2. Discussion of the Prior Art
A number of systems, for example, the Synchronous Optical Network (SONET) prescribed by ANSI T1.105-1988, "Digital Hierarchy Optical Interface Rates and Formats Specification", require a local clock generator that is precisely synchronized to an external reference clock source. For such applications, the system requires a local clock generator that continues to generate clock signals in the event of a loss of the reference clock source; a so-called clock hold-over mode of operation.
Various proposals have been made in the prior art for controlling a local reference clock source synchronized to an external reference clock. One commonly employed approach is to use a frequency responsive loop to establish initial synchronization between the local clock and the external clock, and to use a phase-locked loop to maintain precise synchronization once initial synchronization has been established. While generally satisfactory, these prior art controllers are relatively complex in their implementation and many do not provide for stable clock operation in the absence of the external reference clock. Further, in synchronizing the local clock to the external clock reference, prior art control systems may generate an excessive jitter in the local clock output, either in response to a jitter in the reference clock, or in establishing synchronization after a lost clock reference. As will be appreciated by those skilled in the art, jitter refers to a displacement in time of a significant instant (e.g., a rising edge) in the actual clock signal from its ideal position in time.